IP Library Granted Patent US 11,487,621
Granted Patent B1
US 11,487,621 · App. 17/244,624 · Granted Nov 1, 2022

Linking embedded controller with memory reference code and system bios shadowing

Inventors: Adolfo Montero (Pflugerville, TX); Michael Arms (Pflugerville, TX); Balasingh P. Samuel (Round Rock, TX)
Assignee: Dell Products L.P.
G06F11/1417G06F11/0772G06F11/27G06F11/3037G06F21/54G06F21/575
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Quick Facts
Patent No.
US 11,487,621
App. No.
17/244,624
Filed
Apr 29, 2021
Granted
Nov 1, 2022
Kind
B1
Art Unit
2114
USPC
714/36
Abstract

An information handling system may include at least one processor, a memory, and an embedded controller (EC). The information handling system may be configured to, prior to initialization of an operating system of the information handling system: execute memory reference code configured to test selected regions of the memory; transmit results of the memory reference code to the EC; store, at the EC, information indicative of respective likelihoods that particular regions of the memory are bad; and upon a subsequent boot, select a region of the memory having a low likelihood of being bad for loading a Basic Input/Output System (BIOS) of the information handling system.

Claims (35)

1. An information handling system comprising:

at least one processor;

a memory; and

an embedded controller (EC);

wherein the information handling system is configured to, prior to initialization of an operating system of the information handling system:

execute memory reference code configured to test selected regions of the memory;

transmit results of the memory reference code to the EC;

store, at the EC, information indicative of respective likelihoods that particular regions of the memory are bad, wherein the respective likelihoods are based on a length of time that has passed since a passing test was performed on each respective particular region; and

upon a subsequent boot, select a region of the memory having a low likelihood of being bad for loading a Basic Input/Output System (BIOS) of the information handling system.

2. The information handling system of claim 1 , wherein the BIOS is a Unified Extensible Firmware Interface (UEFI) BIOS.

3. The information handling system of claim 1 , further configured to:

in response to an indication from the EC that insufficient good memory is available to load a standard host operating system, load a service operating system having a reduced memory requirement.

4. The information handling system of claim 3 , further configured to apply a selected notification policy.

5. The information handling system of claim 4 , wherein the selected notification policy includes sending a notification to an administrator regarding bad memory regions.

6. The information handling system of claim 1 , wherein the region of memory selected for loading the BIOS is selected for loading shadowed BIOS code, a stack, and a heap.

7. A method comprising:

an information handling system that comprises a memory and an embedded controller (EC) executing memory reference code configured to test selected regions of the memory;

the information handling system transmitting results of the memory reference code to the EC;

the information handling system storing, at the EC, information indicative of respective likelihoods that particular regions of the memory are bad, wherein the respective likelihoods are based on a length of time that has passed since a passing test was performed on each respective particular region; and

upon a subsequent boot, the information handling system selecting a region of the memory having a low likelihood of being bad for loading a Basic Input/Output System (BIOS) of the information handling system.

8. The method of claim 7 , wherein the BIOS is a Unified Extensible Firmware Interface (UEFI) BIOS.

9. The method of claim 7 , further comprising: in response to an indication from the EC that insufficient good memory is available to load a standard host operating system, loading a service operating system having a reduced memory requirement.

10. The method of claim 9 , further comprising: applying a selected notification policy.

11. The method of claim 10 , wherein the selected notification policy includes sending a notification to an administrator regarding bad memory regions.

12. The method of claim 7 , wherein the region of memory selected for loading the BIOS is selected for loading shadowed BIOS code, a stack, and a heap.

13. An article of manufacture comprising a non-transitory, computer-readable medium having computer-executable code thereon that is executable by a processor of an information handling system for:

executing memory reference code configured to test selected regions of a memory of the information handling system;

transmitting results of the memory reference code to an embedded controller (EC) of the information handling system;

storing, at the EC, information indicative of respective likelihoods that particular regions of the memory are bad, wherein the respective likelihoods are based on a length of time that has passed since a passing test was performed on each respective particular region; and

upon a subsequent boot, selecting a region of the memory having a low likelihood of being bad for loading a Basic Input/Output System (BIOS) of the information handling system.

14. The article of claim 13 , wherein the BIOS is a Unified Extensible Firmware Interface (UEFI) BIOS.

15. The article of claim 13 , wherein the code is further executable for: in response to an indication from the EC that insufficient good memory is available to load a standard host operating system, loading a service operating system having a reduced memory requirement.

16. The article of claim 15 , wherein the code is further executable for applying a selected notification policy.

17. The article of claim 16 , wherein the selected notification policy includes sending a notification to an administrator regarding bad memory regions.

18. The article of claim 13 , wherein the region of memory selected for loading the BIOS is selected for loading shadowed BIOS code, a stack, and a heap.

Assignments (10)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (056295/0280) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 062022/0255 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (056295/0124) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 062022/0012 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (056295/0001) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 062021/0844 →
RELEASE OF SECURITY INTEREST Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 058297/0332 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 6, 2021
From: MONTERO, ADOLFO; ARMS, MICHAEL; SAMUEL, BALASINGH P.
To: DELL PRODUCTS L.P.
Reel/Frame 056765/0420 →
SECURITY INTEREST Recorded May 19, 2021
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 056295/0280 →
SECURITY INTEREST Recorded May 19, 2021
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 056295/0124 →
SECURITY INTEREST Recorded May 19, 2021
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 056295/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE MISSING PATENTS THAT WERE ON THE ORIGINAL SCHEDULED SUBMITTED BUT NOT ENTERED PREVIOUSLY RECORDED AT REEL: 056250 FRAME: 0541. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded May 17, 2021
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
Reel/Frame 056311/0781 →
SECURITY AGREEMENT Recorded May 14, 2021
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
Reel/Frame 056250/0541 →