IP Library Granted Patent US 12,206,753
Granted Patent B1
US 12,206,753 · App. 18/053,465 · Granted Jan 21, 2025

Unified time base for storage device data channel

Inventor: Supaket Katchmart (San Jose, CA)
Assignee: Marvell Asia Pte Ltd
H04L7/0008G11B20/14H03L7/087
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Quick Facts
Patent No.
US 12,206,753
App. No.
18/053,465
Granted
Jan 21, 2025
Kind
B1
Abstract

A method of clocking a data channel of a storage device includes generating a single time-base frequency signal, deriving from the single time-base frequency signal, using a plurality of frequency-modification techniques, a plurality of individual clock signals, each respective one of the individual clock signals being for clocking a respective one of reading, writing and servo functions of the data channel. When the storage device is a disk storage device having a rotational frequency, generating a single time-base frequency signal may include generating a time-base frequency signal based on the rotational frequency. Deviation of the single time-base frequency from the rotational frequency may be detected, and the deviation may be compensated for. Each technique of the frequency-modification techniques may be a digital frequency-modification technique, such as a digital timing recovery technique or a digital frequency division technique.

Claims (47)

1. A method of clocking a data channel of a disk storage device having a rotational frequency, the method comprising:

generating a single time-base frequency signal based on the rotational frequency;

deriving from the single time-base frequency signal, using a plurality of digital frequency-modification techniques, a plurality of individual clock signals, each respective one of the individual clock signals being for clocking a respective one of reading, writing and servo functions of the data channel, wherein:

one of the digital frequency-modification techniques is a write pattern frequency modification technique requiring bit repetition for modification of a write phase; the method further comprising:

oversampling the time-base frequency in portions of the data channel to provide the bit repetition.

2. The method of clocking a data channel according to claim 1 further comprising:

detecting a deviation of the single time-base frequency from the rotational frequency; and

compensating for the deviation.

3. The method of clocking a data channel according to claim 2 wherein:

detecting the deviation of the single time-base frequency from the rotational frequency comprises detecting a time interval between servo wedges; and

compensating for the deviation comprises:

determining a scale factor based on a relationship of the deviation to a period of the single time-base frequency, and

applying the scale factor to each individual clock signal in the plurality of clock signals.

4. The method of clocking a data channel according to claim 2 wherein:

detecting a deviation of the single time-base frequency from the rotational frequency comprises detecting a servo sync mark at a time other than a time expected based on the rotational frequency; and

compensating for the deviation comprises deriving a phase differential from the deviation and applying the phase differential to the single time-base frequency.

5. The method of clocking a data channel according to claim 2 wherein:

detecting a deviation of the single time-base frequency from the rotational frequency comprises detecting a skipped clock using digital timing recovery; and

compensating for the deviation comprises deriving a phase differential from the deviation and applying the phase differential to the single time-base frequency.

6. The method of clocking a data channel according to claim 1 further comprising adjusting a write pattern frequency on a per-sector basis to account for variations in disk surface quality.

7. The method of clocking a data channel according to claim 1 wherein one of the digital frequency-modification techniques is a digital timing recovery technique.

8. The method of clocking a data channel according to claim 1 wherein one of the digital frequency-modification techniques is a digital frequency division technique.

9. A storage device, comprising:

a storage disk, having a rotational frequency, on which data is written; and

a data channel including clock circuitry, the clock circuitry comprising:

circuitry configured to generate a single time-base frequency signal based on the rotational frequency, and

digital frequency-modification circuitry configured to derive from the single time-base frequency signal, using a plurality of digital frequency-modification techniques, a plurality of individual clock signals, each respective one of the individual clock signals being for clocking a respective one of reading, writing and servo functions of the data channel, wherein the digital frequency-modification circuitry comprises:

oversampling circuitry to provide bit repetition in the time-base frequency in portions of the data channel, and

write pattern frequency modification circuitry configured to operate on repetitive bits to modify a write phase.

10. The storage device of claim 9 wherein the circuitry configured to generate a single time-base frequency signal comprises a phase-locked loop.

11. The storage device of claim 9 further comprising:

circuitry configured to detect a deviation of the single time-base frequency from the rotational frequency; and

circuitry configured to compensate for the deviation.

12. The storage device of claim 11 wherein:

the circuitry configured to detect the deviation of the single time-base frequency from the rotational frequency comprises circuitry configured to detect a time interval between servo wedges; and

the circuitry configured to compensate for the deviation comprises:

circuitry configured to determine a scale factor based on a relationship of the deviation to a period of the single time-base frequency, and

circuitry configured to apply the scale factor to each individual clock signal in the plurality of clock signals.

13. The storage device of claim 11 wherein:

the circuitry configured to detect the deviation of the single time-base frequency from the rotational frequency comprises circuitry configured to detect a servo sync mark at a time other than a time expected based on the rotational frequency; and

the circuitry configured to compensate for the deviation comprises circuitry configured to derive a phase differential from the deviation and to apply the phase differential to the single time-base frequency.

14. The storage device of claim 11 wherein:

the circuitry configured to detect the deviation of the single time-base frequency from the rotational frequency comprises circuitry configured to detect a skipped clock using digital timing recovery; and

the circuitry configured to compensate for the deviation comprises circuitry configured to derive a phase differential from the deviation and to apply the phase differential to the single time-base frequency.

15. The storage device of claim 9 wherein the write pattern frequency modification circuitry is further configured to adjust a write pattern frequency on a per-sector basis to account for variations in disk surface quality.

16. The storage device of claim 9 wherein the digital frequency-modification circuitry comprises digital timing recovery circuitry.

17. The storage device of claim 9 wherein the digital frequency-modification circuitry comprises digital frequency division circuitry.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 4, 2024
From: KATCHMART, SUPAKET
To: MARVELL SEMICONDUCTOR, INC.
Reel/Frame 067007/0761 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 4, 2024
From: MARVELL SEMICONDUCTOR, INC.
To: MARVELL ASIA PTE LTD
Reel/Frame 067007/0826 →
Continuity (1)
Provisional Application 63400776 · Aug 25, 2022
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