IP Library Granted Patent US 12,658,207
Granted Patent B1
US 12,658,207 · App. 19/179,142 · Granted Jun 16, 2026

Voltage slew control of fine actuators in hard disk drive

Inventors: Hideaki Ito (Fujisawa, JP); Gaku Ikedo (Fujisawa, JP); Hajime Eguchi (Fujisawa, JP); Ryan Mayo (Aliso Viejo, CA); Akira Yokozuka (Fujisawa, JP)
Assignee: Western Digital Technologies, Inc.
G11B5/556
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Quick Facts
Patent No.
US 12,658,207
App. No.
19/179,142
Granted
Jun 16, 2026
Kind
B1
Abstract

A data storage device comprises a recording head, a disk, a first fine actuator group configured to position the recording head over the disk, and control circuitry. The control circuitry is configured to apply a slew control voltage waveform to the first fine actuator group to transition the first fine actuator group from an active state to an inactive state, and apply a control signal initiating at a last-applied value of the slew control voltage waveform to the first fine actuator group to transition the first fine actuator group back to the active state before completion of the slew control voltage waveform.

Claims (56)

1 . A data storage device comprising:

a recording head;

a disk;

a first fine actuator group configured to position the recording head over the disk; and

control circuitry configured to:

apply a slew control voltage waveform to the first fine actuator group to transition the first fine actuator group from an active state to an inactive state; and

apply a control signal, initiating at a last-applied value of the slew control voltage waveform, to the first fine actuator group to transition the first fine actuator group back to the active state before completion of the slew control voltage waveform.

2 . The data storage device of claim 1 , further comprising a second fine actuator group, wherein the control circuitry is further configured to:

concurrently with applying the control signal to the first fine actuator group, apply the slew control voltage waveform to the second fine actuator group to transition the second fine actuator group from the active state to the inactive state; and

initiate the slew control voltage waveform at a last voltage level of the second fine actuator group before the transition of the second fine actuator group to the inactive state.

3 . The data storage device of claim 2 , wherein the control circuitry comprises a slew control voltage generator configured to generate the slew control voltage waveform as a piecewise quadratic slew control voltage waveform having an S-shaped profile.

4 . The data storage device of claim 3 , wherein the control circuitry comprises:

a system on a chip (SoC); and

a power large scale integrated circuit (PLSI), wherein the PLSI comprises a fine actuator control register configured to receive the control signal from the SoC.

5 . The data storage device of claim 3 , wherein the slew control voltage generator comprises a digital signal processor.

6 . The data storage device of claim 4 , wherein:

the SoC is coupled to an output of the slew control voltage generator to receive the last-applied value of the slew control voltage waveform; and

the slew control voltage generator is coupled to the output of the fine actuator control register to receive the last voltage level of the second fine actuator group.

7 . The data storage device of claim 6 , further comprising:

a first switch for selectively applying the control signal to one of the first fine actuator group and the second fine actuator group; and

a second switch for selectively applying the slew control voltage waveform to another of the first fine actuator group and the second fine actuator group.

8 . The data storage device of claim 7 , wherein the PLSI further comprises:

a first differential amplifier and a first fine actuator driver selectively coupled to the first and second switches and configured to drive the first fine actuator group; and

a second differential amplifier and a second fine actuator driver selectively coupled to the first and second switches and configured to drive the second fine actuator group.

9 . The data storage device of claim 2 , wherein

the first fine actuator group comprises inner fine actuators configured to position an inner head group over a first set of disk surfaces; and

the second fine actuator group comprises outer fine actuators configured to position an outer head group over a second set of disk surfaces.

10 . A method for controlling a data storage device, comprising:

applying a slew control voltage waveform to a first fine actuator group to transition the first fine actuator group from an active state to an inactive state; and

applying a control signal initiating at a last-applied value of the slew control voltage waveform to the first fine actuator group to transition the first fine actuator group back to the active state before completion of the slew control voltage waveform.

11 . The method of claim 10 , further comprising:

concurrently with applying the control signal to the first fine actuator group, applying the slew control voltage waveform to a second fine actuator group to transition the second fine actuator group from the active state to the inactive state; and

initiating the slew control voltage waveform at a last voltage level of the second fine actuator group before the transition of the second fine actuator group to the inactive state.

12 . The method of claim 11 , further comprising generating the slew control voltage waveform by a slew control voltage generator as a piecewise quadratic slew control voltage waveform having an S-shaped profile.

13 . The method of claim 12 , further comprising:

generating the control signal by a system on a chip (SoC); and

receiving the control signal by a fine actuator control register on a power large scale integrated circuit (PLSI).

14 . The method of claim 10 , further comprising generating the slew control voltage waveform by a digital signal processor (DSP).

15 . The method of claim 13 , further comprising:

coupling the SoC to an output of the slew control voltage generator to receive the last-applied value of the slew control voltage waveform; and

coupling the slew control voltage generator to the output of the fine actuator control register to receive the last voltage level of the second fine actuator group.

16 . The method of claim 15 , further comprising:

selectively applying the control signal to one of the first fine actuator group and the second fine actuator group by a first switch; and

selectively applying the slew control voltage waveform to another of the first fine actuator group and the second fine actuator group by a second switch.

17 . The method of claim 16 , further comprising:

selectively coupling the first and second switches to a first differential amplifier and a first fine actuator driver to drive the first fine actuator group; and

selectively coupling the first and second switches to a second differential amplifier and a second fine actuator driver to drive the second fine actuator group.

18 . The method of claim 11 , wherein:

the first fine actuator group comprises inner fine actuators configured to position an inner head group over a first set of disk surfaces; and

the second fine actuator group comprises outer fine actuators configured to position an outer head group over a second set of disk surfaces.

19 . Control circuitry for controlling a data storage device, the control circuitry comprising:

means for applying a slew control voltage waveform to a first fine actuator group to transition the first fine actuator group from an active state to an inactive state; and

means for applying a control signal initiating at a last-applied value of the slew control voltage waveform to the first fine actuator group to transition the first fine actuator group back to the active state before completion of the slew control voltage waveform.

20 . The control circuitry of claim 19 , further comprising:

means for applying, concurrently with applying the control signal to the first fine actuator group, the slew control voltage waveform to a second fine actuator group to transition the second fine actuator group from the active state to the inactive state; and

means for initiating, concurrently with applying the control signal to the first fine actuator group, the slew control voltage waveform at a last voltage level of the second fine actuator group before the transition of the second fine actuator group to the inactive state.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 14, 2025
From: ITO, HIDEAKI; IKEDO, GAKU; EGUCHI, HAJIME; MAYO, RYAN; YOKOZUKA, AKIRA
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 071109/0230 →
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