IP Library Granted Patent US 4,392,200
Granted Patent Utility
US 4,392,200 · App. 06/239,129

Cached multiprocessor system with pipeline timing

Inventors: Jega A. Arulpragasam, Robert Giggi, Richard F. Lary, Daniel T. Sullivan
Patented Case View Patent ↗
Granted: Jul 5, 1983 Filed: Feb 27, 1981
Inventors
Jega A. Arulpragasam
Robert Giggi
Richard F. Lary
Daniel T. Sullivan
Assignee (at issue)
Digital Equipment Corporation

This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.

Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 4,392,200
App. No.
06/239,129
Filed
1981-02-27
Granted
1983-07-05
Kind
A