IP Library Granted Patent US 4,464,631
Granted Patent Utility
US 4,464,631 · App. 06/326,345

Circuit for trimming FET differential pair offset voltage without increasing the offset voltage temperature coefficient

Inventor: John S. Prentice
Patented Case View Patent ↗
Granted: Aug 7, 1984 Filed: Dec 1, 1981
Inventor
John S. Prentice
Assignee (at issue)
HARRIS CORPORATION

This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.

Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 4,464,631
App. No.
06/326,345
Filed
1981-12-01
Granted
1984-08-07
Kind
A