Granted Patent
Utility
US 4,489,401 · App. 06/367,332
Electrical partitioning scheme for improving yields during the manufacture of semiconductor memory arrays
Inventors:
George Smarandoiu, George Perlegos
Patented Case
View Patent ↗
Granted: Dec 18, 1984
Filed: Apr 12, 1982
Inventors
George Smarandoiu
George Perlegos
Assignee (at issue)
Seeq Technology, Incorporated
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.