Granted Patent
Utility
US 4,539,744 · App. 06/576,665
Semiconductor planarization process and structures made thereby
Inventor:
Greg Burton
Patented Case
View Patent ↗
Granted: Sep 10, 1985
Filed: Feb 3, 1983
Inventor
Greg Burton
Assignee (at issue)
Fairchild Camera & Instrument Corp.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.