IP Library Granted Patent US 4,611,337
Granted Patent Utility
US 4,611,337 · App. 06/527,470

Minimal logic synchronous up/down counter implementations for CMOS

Inventor: Michael W. Evans
Patented Case View Patent ↗
Granted: Sep 9, 1986 Filed: Aug 29, 1983
Inventor
Michael W. Evans
Assignee (at issue)
General Electric Company

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Quick Facts
Patent No.
US 4,611,337
App. No.
06/527,470
Filed
1983-08-29
Granted
1986-09-09
Kind
A