IP Library › Granted Patent US 4,612,458
Granted Patent Utility
US 4,612,458 · App. 06/770,817

Merged PMOS/bipolar logic circuits

Inventors: Nader Vasseghi, Donald G. Goddard
Patented Case View Patent ↗
Granted: Sep 16, 1986 Filed: Aug 28, 1985
Inventors
Nader Vasseghi
Donald G. Goddard
Assignee (at issue)
Advanced Micro Devices, Inc.

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Quick Facts
Patent No.
US 4,612,458
App. No.
06/770,817
Filed
1985-08-28
Granted
1986-09-16
Kind
A