IP Library › Granted Patent US 4,654,121
Granted Patent Utility
US 4,654,121 · App. 06/833,686

Fabrication process for aligned and stacked CMOS devices

Inventors: Gayle W. Miller, Nicholas J. Szluk, William W. McKinley, Hubert O. Hayworth, George Maheras
Patented Case View Patent ↗
Granted: Mar 31, 1987 Filed: Feb 27, 1986
Inventors
Gayle W. Miller
Nicholas J. Szluk
William W. McKinley
Hubert O. Hayworth
George Maheras
Assignee (at issue)
NCR Corporation

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Quick Facts
Patent No.
US 4,654,121
App. No.
06/833,686
Filed
1986-02-27
Granted
1987-03-31
Kind
A