IP Library › Granted Patent US 4,670,672
Granted Patent Utility
US 4,670,672 · App. 06/694,174

C-MOS logic circuit supplied with narrow width pulses converted from input pulses

Inventors: Tsuyoshi Ando, Yasunobu Okano
Patented Case View Patent ↗
Granted: Jun 2, 1987 Filed: Jan 23, 1985
Inventors
Tsuyoshi Ando
Yasunobu Okano
Assignee (at issue)
NEC CORPORATION

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Quick Facts
Patent No.
US 4,670,672
App. No.
06/694,174
Filed
1985-01-23
Granted
1987-06-02
Kind
A