Granted Patent
Utility
US 4,719,627 · App. 06/835,777
Memory system employing a low DC power gate array for error correction
Inventors:
LuVerne Ray Peterson, Stephen J. Chung Chan
Patented Case
View Patent ↗
Granted: Jan 12, 1988
Filed: Mar 3, 1986
Inventors
LuVerne Ray Peterson
Stephen J. Chung Chan
Assignee (at issue)
Unisys Corporation
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.