IP Library Granted Patent US 4,811,237
Granted Patent Utility
US 4,811,237 · App. 07/065,998

Structured design method for generating a mesh power bus structure in high density layout of VLSI chips

Inventors: Rathindra N. Putatunda, David C. Smith, Stephen A. McNeary
Patented Case View Patent ↗
Granted: Mar 7, 1989 Filed: Jun 24, 1987
Inventors
Rathindra N. Putatunda
David C. Smith
Stephen A. McNeary
Assignee (at issue)
General Electric Company

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Quick Facts
Patent No.
US 4,811,237
App. No.
07/065,998
Filed
1987-06-24
Granted
1989-03-07
Kind
A