Granted Patent
Utility
US 4,815,003 · App. 07/064,044
Structured design method for high density standard cell and macrocell layout of VLSI chips
Inventors:
Rathindra N. Putatunda, David C. Smith, Stephen A. McNeary
Patented Case
View Patent ↗
Granted: Mar 21, 1989
Filed: Jun 19, 1987
Inventors
Rathindra N. Putatunda
David C. Smith
Stephen A. McNeary
Assignee (at issue)
General Electric Company
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.