Granted Patent
Utility
US 4,821,299 · App. 07/015,347
Semiconductor integrated circuit device including shift register having substantially equalized wiring between stages thereof
Inventors:
Hideki Kawai, Masaru Fujii, Kiyoto Ohta, Masahiko Sakagami
Patented Case
View Patent ↗
Granted: Apr 11, 1989
Filed: Feb 17, 1987
Inventors
Hideki Kawai
Masaru Fujii
Kiyoto Ohta
Masahiko Sakagami
Assignee (at issue)
Matsushita Electronics Corporation
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.