IP Library Granted Patent US 4,824,802
Granted Patent Utility
US 4,824,802 · App. 07/104,002

Method of filling interlevel dielectric via or contact holes in multilevel VLSI metallization structures

Inventors: Dale M. Brown, Bernard Gorowitz, Richard Joseph Saia
Patented Case View Patent ↗
Granted: Apr 25, 1989 Filed: Oct 2, 1987
Inventors
Dale M. Brown
Bernard Gorowitz
Richard Joseph Saia
Assignee (at issue)
General Electric Company

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Quick Facts
Patent No.
US 4,824,802
App. No.
07/104,002
Filed
1987-10-02
Granted
1989-04-25
Kind
A