IP Library › Granted Patent US 4,841,174
Granted Patent Utility
US 4,841,174 · App. 07/013,694

CMOS circuit with racefree single clock dynamic logic

Inventors: Randall M. Chung, Bradley S. Masters
Patented Case View Patent ↗
Granted: Jun 20, 1989 Filed: Feb 12, 1987
Inventors
Randall M. Chung
Bradley S. Masters
Assignee (at issue)
Western Digital

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Quick Facts
Patent No.
US 4,841,174
App. No.
07/013,694
Filed
1987-02-12
Granted
1989-06-20
Kind
A