Granted Patent
Utility
US 4,852,039 · App. 07/064,836
Apparatus and method for accelerating floating point addition and subtraction operations by accelerating the effective subtraction procedure
Inventors:
Vijay Maheshwari, Sridhar Samudrala, Nachum M. Gavrielov
Patented Case
View Patent ↗
Granted: Jul 25, 1989
Filed: Jun 19, 1987
Inventors
Vijay Maheshwari
Sridhar Samudrala
Nachum M. Gavrielov
Assignee (at issue)
Digital Equipment Corporation
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.