Granted Patent
Utility
US 4,926,069 · App. 07/233,072
Bi-MOS circuit capable of high speed operation with low power consumption
Inventor:
Toru Yamazaki
Patented Case
View Patent ↗
Granted: May 15, 1990
Filed: Aug 17, 1988
Inventor
Toru Yamazaki
Assignee (at issue)
NEC CORPORATION
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.