Granted Patent
Utility
US 5,019,997 · App. 07/361,623
Adaptive lithography accommodation of tolerances in chip positioning in high density interconnection structures
Inventor:
Thoedore R. Haller
Patented Case
View Patent ↗
Granted: May 28, 1991
Filed: Jun 5, 1989
Inventor
Thoedore R. Haller
Assignee (at issue)
General Electric Company
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.