Granted Patent
Utility
US 5,041,968 · App. 07/535,300
Reduced instruction set computer (RISC) type microprocessor executing instruction functions indicating data location for arithmetic operations and result location
Inventor:
Yoshiko Yamaguchi
Patented Case
View Patent ↗
Granted: Aug 20, 1991
Filed: Jun 8, 1990
Inventor
Yoshiko Yamaguchi
Assignee (at issue)
NEC CORPORATION
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.