Granted Patent
Utility
US 5,168,341 · App. 07/675,665
Bipolar-CMOS integrated circuit having a structure suitable for high integration
Inventors:
Kouichi Kumagai, Kenji Yoshida
Patented Case
View Patent ↗
Granted: Dec 1, 1992
Filed: Mar 27, 1991
Inventors
Kouichi Kumagai
Kenji Yoshida
Assignee (at issue)
NEC CORPORATION
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.