Granted Patent
Utility
US 5,212,411 · App. 07/801,542
Flip-flop circuit having CMOS hysteresis inverter
Inventor:
Hiroshi Asazawa
Patented Case
View Patent ↗
Granted: May 18, 1993
Filed: Dec 2, 1991
Inventor
Hiroshi Asazawa
Assignee (at issue)
NEC CORPORATION
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.