Granted Patent
Utility
US 5,212,653 · App. 07/658,620
Method for producing a layout of element portions for a semiconductor integrated circuit using a computer
Inventor:
Makoto Tanaka
Patented Case
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Granted: May 18, 1993
Filed: Feb 21, 1991
Inventor
Makoto Tanaka
Assignee (at issue)
Matsushita Electronics Corporation
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.