Granted Patent
Utility
US 5,218,220 · App. 07/789,901
Power FET having reduced threshold voltage
Inventors:
John Manning Savidge Neilson, Frederick P. Jones, Joseph A. Yedinak
Patented Case
View Patent ↗
Granted: Jun 8, 1993
Filed: Nov 12, 1991
Inventors
John Manning Savidge Neilson
Frederick P. Jones
Joseph A. Yedinak
Assignee (at issue)
HARRIS CORPORATION
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.