Granted Patent
Utility
US 5,247,199 · App. 07/928,992
Process for forming twin well CMOS integrated circuits
Inventor:
Dyer A. Matlock
Patented Case
View Patent ↗
Granted: Sep 21, 1993
Filed: Aug 12, 1992
Inventor
Dyer A. Matlock
Assignee (at issue)
HARRIS CORPORATION
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.