Granted Patent
Utility
US 5,331,594 · App. 07/776,052
Semiconductor memory device having word line and bit line test circuits
Inventor:
Yasuhiro Hotta
Patented Case
View Patent ↗
Granted: Jul 19, 1994
Filed: Oct 10, 1991
Inventor
Yasuhiro Hotta
Assignee (at issue)
SHARP KABUSHIKI KAISHA
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.