Method for producing self-aligned LDD CMOS, DMOS with deeper source/drain and P-base regions and, bipolar devices on a common substrate

Granted: Aug 23, 1994 Filed: Jun 2, 1993

This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.