IP Library Granted Patent US 5,389,738
Granted Patent Utility
US 5,389,738 · App. 07/878,271

Tamperproof arrangement for an integrated circuit device

Inventors: Gerald V. Piosenka, David M. Harrison, Ronald V. Chandos
Patented Case View Patent ↗
Granted: Feb 14, 1995 Filed: May 4, 1992
Inventors
Gerald V. Piosenka
David M. Harrison
Ronald V. Chandos
Assignee (at issue)
Motorola, Inc.

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Quick Facts
Patent No.
US 5,389,738
App. No.
07/878,271
Filed
1992-05-04
Granted
1995-02-14
Kind
A