IP Library › Granted Patent US 5,422,513
Granted Patent Utility
US 5,422,513 · App. 08/329,516

Integrated circuit chip placement in a high density interconnect structure

Inventors: Walter M. Marcinkiewicz, Raymond Albert Fillion, Barry Scott Whitmore, Robert J. Wojnarowski
Patented Case View Patent ↗
Granted: Jun 6, 1995 Filed: Oct 4, 1993
Inventors
Walter M. Marcinkiewicz
Raymond Albert Fillion
Barry Scott Whitmore
Robert J. Wojnarowski
Assignee (at issue)
LOCKHEED MARTIN CORPORATION

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Quick Facts
Patent No.
US 5,422,513
App. No.
08/329,516
Filed
1993-10-04
Granted
1995-06-06
Kind
A