Granted Patent
Utility
US 5,426,327 · App. 08/117,638
MOS semiconductor with LDD structure having gate electrode and side spacers of polysilicon with different impurity concentrations
Inventor:
Ichiro Murai
Patented Case
View Patent ↗
Granted: Jun 20, 1995
Filed: Sep 8, 1993
Inventor
Ichiro Murai
Assignee (at issue)
NIPPON STEEL CORPORATION
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.