IP Library › Granted Patent US 5,440,752
Granted Patent Utility
US 5,440,752 · App. 07/726,893

Microprocessor architecture with a switch network for data transfer between cache, memory port, and IOU

Inventors: Derek J. Lentz, Yasuaki Hagiwara, Te-Li Lau, Cheng-Long Tang, Le Trong Nguyen
Patented Case View Patent ↗
Granted: Aug 8, 1995 Filed: Jul 8, 1991
Inventors
Derek J. Lentz
Yasuaki Hagiwara
Te-Li Lau
Cheng-Long Tang
Le Trong Nguyen
Assignee (at issue)
SEIKO EPSON CORPORATION

This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.

Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 5,440,752
App. No.
07/726,893
Filed
1991-07-08
Granted
1995-08-08
Kind
A