Granted Patent
Utility
US 5,453,640 · App. 08/359,996
Semiconductor integrated circuit having MOS memory and bipolar peripherals
Inventor:
Yasushi Kinoshita
Patented Case
View Patent ↗
Granted: Sep 26, 1995
Filed: Dec 20, 1994
Inventor
Yasushi Kinoshita
Assignee (at issue)
NEC CORPORATION
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.