Granted Patent
Utility
US 5,453,951 · App. 08/297,723
Fast voltage equilibration of complementary data lines following write cycle in memory circuits
Inventor:
Robert J. Proebsting
Patented Case
View Patent ↗
Granted: Sep 26, 1995
Filed: Aug 26, 1994
Inventor
Robert J. Proebsting
Assignee (at issue)
Townsend and Townsend Khourie and Crew
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.