Granted Patent
Utility
US 5,475,340 · App. 08/247,816
Active biasing circuit for an epitaxial region in a fault-tolerant, vertical pnp output transistor
Inventor:
Mark W. Gose
Patented Case
View Patent ↗
Granted: Dec 12, 1995
Filed: May 23, 1994
Inventor
Mark W. Gose
Assignee (at issue)
DELCO ELECTRONICS CORPORATION
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.