IP Library › Granted Patent US 5,477,176
Granted Patent Utility
US 5,477,176 · App. 08/253,076

Power-on reset circuit for preventing multiple word line selections during power-up of an integrated circuit memory

Inventors: Ray L. Chang, Lawrence F. Childs, Kenneth W. Jones, Donovan Raatz, Stephen T. Flannagan
Patented Case View Patent ↗
Granted: Dec 19, 1995 Filed: Jun 2, 1994
Inventors
Ray L. Chang
Lawrence F. Childs
Kenneth W. Jones
Donovan Raatz
Stephen T. Flannagan
Assignee (at issue)
Motorola, Inc.

This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.

Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 5,477,176
App. No.
08/253,076
Filed
1994-06-02
Granted
1995-12-19
Kind
A