IP Library Granted Patent US 5,485,595
Granted Patent Utility
US 5,485,595 · App. 08/131,495

Flash memory mass storage architecture incorporating wear leveling technique without using cam cells

Inventors: Mahmud Assar, Petro Estakhri, Siamack Nemazie, Mahmood Mozaffari
Patented Case View Patent ↗
Granted: Jan 16, 1996 Filed: Oct 4, 1993
Inventors
Mahmud Assar
Petro Estakhri
Siamack Nemazie
Mahmood Mozaffari
Assignee (at issue)
Cirrus Logic Inc.

This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.

Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 5,485,595
App. No.
08/131,495
Filed
1993-10-04
Granted
1996-01-16
Kind
A