IP Library › Granted Patent US 5,486,480
Granted Patent Utility
US 5,486,480 · App. 08/330,645

Method of fabrication of protected programmable transistor with reduced parasitic capacitances

Inventor: Teh-Yi J. Chen
Patented Case View Patent ↗
Granted: Jan 23, 1996 Filed: Oct 28, 1994
Inventor
Teh-Yi J. Chen
Assignee (at issue)
North American Philips Corporation

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Quick Facts
Patent No.
US 5,486,480
App. No.
08/330,645
Filed
1994-10-28
Granted
1996-01-23
Kind
A