IP Library › Granted Patent US 5,487,096
Granted Patent Utility
US 5,487,096 · App. 08/259,421

Integrated circuit with real time, elapsed time, and cycle counter clocks

Inventors: Ronald W. Pearson, Kevin Deierling, Clark R. Williams
Patented Case View Patent ↗
Granted: Jan 23, 1996 Filed: Jun 14, 1994
Inventors
Ronald W. Pearson
Kevin Deierling
Clark R. Williams
Assignee (at issue)
Dallas Semiconductor Corporation

This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.

Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 5,487,096
App. No.
08/259,421
Filed
1994-06-14
Granted
1996-01-23
Kind
A