Granted Patent
Utility
US 5,493,687 · App. 07/726,773
RISC microprocessor architecture implementing multiple typed register sets
Inventors:
Sanjiv Garg, Derek J. Lentz, Le Trong Nguyen, Sho Long Chen
Patented Case
View Patent ↗
Granted: Feb 20, 1996
Filed: Jul 8, 1991
Inventors
Sanjiv Garg
Derek J. Lentz
Le Trong Nguyen
Sho Long Chen
Assignee (at issue)
SEIKO EPSON CORPORATION
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.