Granted Patent
Utility
US 5,501,993 · App. 08/343,116
Method of constructing CMOS vertically modulated wells (VMW) by clustered MeV BILLI (buried implanted layer for lateral isolation) implantation
Inventor:
John O. Borland
Patented Case
View Patent ↗
Granted: Mar 26, 1996
Filed: Nov 22, 1994
Inventor
John O. Borland
Assignee (at issue)
Genus, Inc.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.