Granted Patent
Utility
US 5,508,642 · App. 08/472,071
Series-gated emitter-coupled logic circuit providing closely spaced output voltages
Inventor:
Loren Yee
Patented Case
View Patent ↗
Granted: Apr 16, 1996
Filed: Jun 5, 1995
Inventor
Loren Yee
Assignee (at issue)
NATIONAL SEMICONDUCTOR CORPORATION
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.