IP Library Granted Patent US 5,537,538
Granted Patent Utility
US 5,537,538 · App. 08/166,969

Debug mode for a superscalar RISC processor

Inventors: Joseph P. Bratt, John Brennan, Peter Hsu, Chandra Joshi, William A. Huffman, Monica R. Nofal, Paul Rodman, Joseph T. Scanlon, Man Kit Tang
Patented Case View Patent ↗
Granted: Jul 16, 1996 Filed: Dec 15, 1993
Inventors
Joseph P. Bratt
John Brennan
Peter Hsu
Chandra Joshi
William A. Huffman
Monica R. Nofal
Paul Rodman
Joseph T. Scanlon
Man Kit Tang
Assignee (at issue)
Silicon Graphics, Inc.

This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.

Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 5,537,538
App. No.
08/166,969
Filed
1993-12-15
Granted
1996-07-16
Kind
A