Granted Patent
Utility
US 5,539,652 · App. 08/384,909
Method for manufacturing test simulation in electronic circuit design
Inventor:
Mauro V. Tegethoff
Patented Case
View Patent ↗
Granted: Jul 23, 1996
Filed: Feb 7, 1995
Inventor
Mauro V. Tegethoff
Assignee (at issue)
Hewlett-Packard Company, L.P.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.