IP Library › Granted Patent US 5,539,754
Granted Patent Utility
US 5,539,754 · App. 07/957,536

Method and circuitry for generating syndrome bits within an error correction and detection circuit

Inventors: George D. Zuras, Jr., Alexander J. Neudeck
Patented Case View Patent ↗
Granted: Jul 23, 1996 Filed: Oct 5, 1992
Inventors
George D. Zuras, Jr.
Alexander J. Neudeck
Assignee (at issue)
Hewlett-Packard Company, L.P.

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Quick Facts
Patent No.
US 5,539,754
App. No.
07/957,536
Filed
1992-10-05
Granted
1996-07-23
Kind
A