Granted Patent
Utility
US 5,572,713 · App. 08/379,710
System and method for obtaining correct byte addresses by using logical operations on 2 least significant bits of byte address to facilitate compatibility between computer architectures having different memory orders
Inventors:
Larry B. Weber, Earl A. Killian, Mark Himelstein
Patented Case
View Patent ↗
Granted: Nov 5, 1996
Filed: Jan 27, 1995
Inventors
Larry B. Weber
Earl A. Killian
Mark Himelstein
Assignee (at issue)
Silicon Graphics, Inc.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.