IP Library Granted Patent US 5,577,074
Granted Patent Utility
US 5,577,074 · App. 08/546,028

Combined clock recovery/frequency stabilization loop

Inventors: David Roos, Robert W. Davis
Patented Case View Patent ↗
Granted: Nov 19, 1996 Filed: Oct 20, 1995
Inventors
David Roos
Robert W. Davis
Assignee (at issue)
HUGHES ELECTRONICS LIMITED

This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.

Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 5,577,074
App. No.
08/546,028
Filed
1995-10-20
Granted
1996-11-19
Kind
A