Granted Patent
Utility
US 5,581,205 · App. 08/358,304
Semiconductor device capable of assembling adjacent sub chips into one chip
Inventor:
Tadahiko Sugibayashi
Patented Case
View Patent ↗
Granted: Dec 3, 1996
Filed: Dec 19, 1994
Inventor
Tadahiko Sugibayashi
Assignee (at issue)
NEC CORPORATION
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.