Granted Patent
Utility
US 5,587,919 · App. 08/233,791
Apparatus and method for logic optimization by redundancy addition and removal
Inventors:
Kwang-Ting Cheng, Luis Entrena
Patented Case
View Patent ↗
Granted: Dec 24, 1996
Filed: Apr 22, 1994
Inventors
Kwang-Ting Cheng
Luis Entrena
Assignee (at issue)
LUCENT TECHNOLOGIES INC.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.