Granted Patent
Utility
US 5,587,950 · App. 08/461,907
Test circuit in clock synchronous semiconductor memory device
Inventors:
Seiji Sawada, Yasuhiro Konishi
Patented Case
View Patent ↗
Granted: Dec 24, 1996
Filed: Jun 5, 1995
Inventors
Seiji Sawada
Yasuhiro Konishi
Assignee (at issue)
MITSUBISHI ELECTRIC CORPORATION
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.